Sunshine is committed to technology development
Our CTO David Aldape has over 30 years of industry experience,and leads a dedicated team of R&D engineers.
Development projects for 2016-2017:
Increase Plating Aspect Ratio to 30:1 or higher
Backplane capability;large format and very thick boards
Reduce controlled impedance to lerance of ±5% or less
Introduction of advanced plating and photo lithography methods
Advanced tooling systems for improving L2L registration
Continual addition of new materials for HDI, High Speed/Low Loss,thinnerstructures and sub‐assemblies applications (for example: ZETA®,I‐Tera®,I‐Speed®,Tachyon G100®, Megtron 7, and EMC 828&888K)
Deep Microvias (L1‐L3, Aspect Ratio 1:1 or greater)
Thermal Management Solutions: Metal Core, Conductive Paste (Ormet and Tatsuta)
Embedded Component PCBs.
| Technology Roadmap | |||||
|---|---|---|---|---|---|
| inch [mm] | Standard | Advanced | Emerging | Future | |
| Key Attributes | Layer Count | Up to 32L | Up to 40L | 40L to 48L | >50+L |
| Min/Max Thickness | 012” [.30]/.200" [5.0] | .008" [.20]/.256" [6.5] | .006” [.15]/.315" [8.0] | TBD/≥.394" [10.0] | |
| Largest Panel | 24x28[610x712] | 24x30 [610 x 760] | 24x32 [610 x 812] | undetermined | |
| Minimum Line and Space (Copper Wts*) | Inners | .003" [.076] H | .0025" [.064] H | <.002" [.05] H | <.002" [.05] H |
| Outers | .004" [.10] 1 | .003" [.076] 1 | <.0025" [.064] 1 | <.0025" [.064] 1 | |
| Tolerance | ±.0005" [.013] | ±.0003" [.008] | ±.00025" [.006] | ±.0002" [.005] | |
| Drilled Vias Size | Drill Size | .008" [.20] | .006" [.15] | .005" [.13] | .004" [.10] |
| Pad Diameter | +.008" [.20] | +.008" [.20] | +.006" [.15] | .004" [.10] | |
| Aspect Ratio | 25:1 | 30:1 | 40:1 | ＞40:1 | |
| Base copper weights: 1=1oz H=1/2 OZ, T=3/8 OZ, Q=1/4 OZ | |||||
| Via Structures | Microvias | 2+N+2 | 3+N+3 | 4+N+4,ELIC | UNiFYi MVs |
| Buried Subs | Yes | Yes | Yes | Yes | |
| Stacked Microvia | Stacked/Staggered | Offset/Staggered | Offset/Staggered | Offset/Staggered | |
| Microvias | Min Via Size | .004" [.10] | .003" [.076] | .002" [.05] | .002" [.05] |
| Pad Diameter | +.006" [.15] | +.004" [.10] | +.003" [.76] | +.003" [.076] | |
| Aspect Ratio | 0.8:1 | 0.8:1 | 1:1 | 1.2:1 | |
| Conductive & Non-Conductive Via Fill | Min Hole Size | .008" [.20] | .006" [.15] | .005" [.13] | <.005" [.13] |
| Aspect Ratio | 25:1 | 30:1 | 40:1 | ＞40:1 | |
| Soldermask | Registration | ±.002" [.05] | ±.0015" [.038] | ±.001" [.025] | Tangency |
| Min Opening | .004" [.10] | .003" [.076] | .002" [.05] | SMDP | |
| Dam Min Width | .003" [.08] | .002" [.05] | .0015" [.038] | Eng Eval | |
| Surface Finishes | ENIG, OSP | ENEPIG | Thick Gold Multiple Finishes | undetermined | |
| Im Sn, Im Ag | Wire Bondable Gold | ||||
| LF HASL | Multiple Finishes | ||||
| Hard Gold Body | |||||
| Material Options | Rogers 3000/4000 | Ultra Low Loss Dk/Df | Buried Wire Buried Components | ||
| Halogen Free FR4 EMC 828, EMC 888K | I-Tera® I-Speed® EMC 891K | Tachyon 100G® MetroWave | |||
| Buried Capacitance | Polyimid, Megtron 6N | Megtron 7N, EMC 890K | |||
| 408 HR Nelco-13s | Hybrid PCBs | Thermal Management PCBs | |||
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